[OpenBIOS] [PATCH 1/2] PPC: Fix PCI configuration space address access

[Mark Cave-Ayland]

On 31/08/13 22:18, Hervé Poussineau wrote:

> Mark Cave-Ayland a écrit :
>> This patch corrects two long-standing bugs with PPC PCI configuration
>> space
>> access. Firstly fix the calculation of PCI configuration space
>> addresses by
>> the PCI_ADDR macro; this was incorrectly using arch->cfg_base which is
>> the
>> mapped address and has nothing to do with the PCI configuration space
>> address. Instead just set bit 31 to initiate a configuration cycle as
>> per the
>> PCI specification.
>>
>> Secondly, fix pci_config_read32() and pci_config_write16() which were
>> incorrectly adding the register offset to the PCI IO dataport address
>> causing
>> them to write into unknown address space for registers > 0. It appears
>> that
>> this only worked purely by coincidence with QEMU due to the way in
>> which the
>> configuration address was calculated for an oversized PCI
>> configuration IO
>> dataport MemoryRegion.
>>
>> Reported-by: Hervé Poussineau <hpoussin at reactos.org>
>> CC: Hervé Poussineau <hpoussin at reactos.org>
>> CC: Andreas Färber <afaerber at suse.de>
>> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland at ilande.co.uk>
>> ---
>
> Tested-by: Hervé Poussineau <hpoussin at reactos.org>
>
> However, note the typo in the commit message, where the wrong function
> is pci_config_write32, not pci_config_write16

Thanks for testing - committed with a corrected commit message.


ATB,

Mark.