[openfirmware] [commit] r3144 - cpu/arm/mmp2
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svn at openfirmware.info
Thu Aug 9 14:28:19 CEST 2012
Author: wmb
Date: Thu Aug 9 14:28:19 2012
New Revision: 3144
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/3144
Log:
OLPC CL4 - added some MMP3-specific entries to the list of clock reset registers.
Modified:
cpu/arm/mmp2/apbc.fth
cpu/arm/mmp2/pmua.fth
Modified: cpu/arm/mmp2/apbc.fth
==============================================================================
--- cpu/arm/mmp2/apbc.fth Thu Aug 9 14:27:13 2012 (r3143)
+++ cpu/arm/mmp2/apbc.fth Thu Aug 9 14:28:19 2012 (r3144)
@@ -44,6 +44,7 @@
" UART4" +string \ 32
" RIPC" +string \ 33
" THSENS1" +string \ 34
+" CORESIGHT" +string \ 35
" clock-output-names" property
: +int encode-int encode+ ;
@@ -85,6 +86,7 @@
h# 88 +int h# 77 +int h# 17 +int d# 26,000,000 +int \ 32 UART4
h# 8c +int h# 77 +int h# 7 +int d# 26,000,000 +int \ 33 RIPC
h# 90 +int h# 77 +int h# 7 +int d# 26,000,000 +int \ 34 THSENS1
+h# 94 +int h# 7 +int h# 7 +int d# 26,000,000 +int \ 35 CORESIGHT
" clock-enable-registers" property
end-package
Modified: cpu/arm/mmp2/pmua.fth
==============================================================================
--- cpu/arm/mmp2/pmua.fth Thu Aug 9 14:27:13 2012 (r3143)
+++ cpu/arm/mmp2/pmua.fth Thu Aug 9 14:28:19 2012 (r3144)
@@ -38,6 +38,13 @@
" ISP" +string \ 22
" EPD" +string \ 23
" APB2" +string \ 24
+" SPMI" +string \ 25
+" EPD" +string \ 26
+" USB3SS" +string \ 27
+" SDH4" +string \ 28
+" DSA" +string \ 29
+" TPIU" +string \ 30
+" ISP" +string \ 31
" clock-output-names" property
: +int encode-int encode+ ;
@@ -69,6 +76,15 @@
h# 120 +int h# 3f +int h# 3f +int d# 0 +int \ 22 ISP
h# 124 +int h# 1b +int h# 1b +int d# 0 +int \ 23 EPD
h# 134 +int h# 12 +int h# 12 +int d# 0 +int \ 24 APB2
+[ifdef] mmp3
+h# 140 +int h# 1b +int h# 1b +int d# 0 +int \ 25 SPMI - XXX may need to set clock divisor bits
+h# 144 +int h# 21b +int h# 21b +int d# 0 +int \ 26 EPD
+h# 148 +int h# 9 +int h# 9 +int d# 0 +int \ 27 USB3SS
+h# 15c +int h# 1b +int h# 1b +int d# 0 +int \ 28 SDH4
+h# 164 +int h# f +int h# f +int d# 0 +int \ 29 DSA xx
+h# 18c +int h# 12 +int h# 12 +int d# 0 +int \ 30 TPIU
+h# 224 +int h# 1b +int h# 1b +int d# 0 +int \ 31 ISP Need to do the redundancy dance
+[then]
" clock-enable-registers" property
end-package
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