[OpenBIOS] [PATCH 4/4] ppc64: Set SF bit before entering ELF binary
Andreas Färber
andreas.faerber at web.de
Sat Dec 18 01:40:53 CET 2010
Am 15.12.2010 um 01:11 schrieb Andreas Färber:
> Signed-off-by: Andreas Färber <andreas.faerber at web.de>
> ---
> arch/ppc/qemu/start.S | 4 ++++
> include/arch/ppc/processor.h | 2 ++
> 2 files changed, 6 insertions(+), 0 deletions(-)
>
> diff --git a/arch/ppc/qemu/start.S b/arch/ppc/qemu/start.S
> index 7846463..0fc4496 100644
> --- a/arch/ppc/qemu/start.S
> +++ b/arch/ppc/qemu/start.S
> @@ -494,7 +494,11 @@ _GLOBAL(call_elf):
> LOAD_REG_IMMEDIATE(r5, of_client_callback) // r5 = callback
> li r6,0 // r6 = address of client program arguments (unused)
> li r7,0 // r7 = length of client program arguments (unused)
> +#ifdef CONFIG_PPC64
> + LOAD_REG_IMMEDIATE(r0, MSR_SF | MSR_FP | MSR_ME | MSR_DR |
> MSR_IR)
Setting SF here is what breaks Debian GNU/Linux. AIX seems unaffected
as far as tested.
> +#else
> li r0,MSR_FP | MSR_ME | MSR_DR | MSR_IR
> +#endif
> MTMSRD(r0)
> blrl
>
> diff --git a/include/arch/ppc/processor.h b/include/arch/ppc/
> processor.h
> index 21e4fab..e00fea0 100644
> --- a/include/arch/ppc/processor.h
> +++ b/include/arch/ppc/processor.h
> @@ -40,6 +40,8 @@
>
> #ifndef MSR_VEC
>
> +#define MSR_SF (1<<63) /* Sixty-Four Bit Mode */
> +
> #define MSR_VEC (1<<25) /* 6: Enable AltiVec */
> #define MSR_POW (1<<18) /* 13: Enable Power Management */
> #define MSR_TGPR (1<<17) /* 14: TLB Update registers in use */
> --
> 1.7.3
>
>
> --
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