[openfirmware] [commit] r2199 - cpu/arm/marvell
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Sat May 14 02:49:07 CEST 2011
Author: wmb
Date: Sat May 14 02:49:07 2011
New Revision: 2199
URL: http://tracker.coreboot.org/trac/openfirmware/changeset/2199
Log:
OLPC XO-1.75 - Changed some values for the USB OTG PHY to match values I got from some source code drop.
Modified:
cpu/arm/marvell/utmiphy.fth
Modified: cpu/arm/marvell/utmiphy.fth
==============================================================================
--- cpu/arm/marvell/utmiphy.fth Fri May 13 00:09:17 2011 (r2198)
+++ cpu/arm/marvell/utmiphy.fth Sat May 14 02:49:07 2011 (r2199)
@@ -6,6 +6,7 @@
h# d420700c constant utmi-tx
h# d4207010 constant utmi-rx
h# d4207014 constant utmi-ivref
+h# d4207018 constant utmi-t0
: regset ( mask adr -- ) tuck l@ or swap l! ;
: regclr ( mask adr -- ) tuck l@ swap invert and swap l! ;
@@ -16,14 +17,16 @@
loop
." PLL calibrate timeout" cr
;
-h# 7e03.ffff value pll-clr \ PLLCALI12, PLLVDD18, PLLVDD12, KVCO, ICP, FBDIV, REFDIV,
-h# 7e01.aeeb value pll-set \ 3 3 3 3 2 ee b
+\ h# 7e03.ffff value pll-clr \ PLLCALI12, PLLVDD18, PLLVDD12, KVCO, ICP, FBDIV, REFDIV,
+\ h# 7e01.aeeb value pll-set \ 3 3 3 3 2 ee b
+h# 0003.ffff value pll-clr \ KVCO, ICP, FBDIV, REFDIV,
+h# 7e01.9eeb value pll-set \ 3 3 3 3 1 ee b
h# 00df.c000 value tx-clr \ TXVDD12, CK60_PHSEL, IMPCAL_VTH
-h# 00c9.4000 value tx-set \ 3 4 5
+h# 00c8.0000 value tx-set \ 3 4 0
-h# 0001.80f0 value rx-clr \ REG_SQ_LENGTH, RX_SQ_THRESH
-h# 0001.000a value rx-set \ 2 a
+h# 0000.00f0 value rx-clr \ RX_SQ_THRESH
+h# 0000.0070 value rx-set \ 7
: init-usb-phy ( -- )
[ifdef] notdef
@@ -35,19 +38,27 @@
\ Turn on the USB PHY power
h# 1010.0000 utmi-ctrl regset \ INPKT_DELAY_SOF, PU_REF
h# 2 utmi-ctrl regset \ PLL_PWR_UP
+ d# 10 ms
h# 1 utmi-ctrl regset \ PWR_UP
+ 1 ms
+
+ \ Linux code does this, perhaps redundantly
+ h# 1000.0000 utmi-ctrl regset \ INPKT_DELAY_SOF, PU_REF
+
+ h# 0000.8000 utmi-t0 regclr \ REG_FIFO_SQ_RST
\ Configure the PLLs
pll-clr utmi-pll regclr \ PLLCALI12, PLLVDD18, PLLVDD12, KVCO, ICP, FBDIV, REFDIV,
- pll-set utmi-pll regset \ 3 3 3 3 2 ee b
+ pll-set utmi-pll regset \ 3 3 3 3 1 ee b
+ 1 ms
tx-clr utmi-tx regclr \ TXVDD12, CK60_PHSEL, IMPCAL_VTH
- tx-set utmi-tx regset \ 3 4 5
+ tx-set utmi-tx regset \ 3 4 0
- rx-clr utmi-rx regclr \ REG_SQ_LENGTH, RX_SQ_THRESH
- rx-set utmi-rx regset \ 2 a
+ rx-clr utmi-rx regclr \ RX_SQ_THRESH
+ rx-set utmi-rx regset \ 7
- d# 10000 wait-cal
+ d# 1000 wait-cal
d# 200 us
h# 0020.0000 utmi-pll regset \ VCOCAL_START
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